Designing HPC Architectures at BSC
Speaker: Miquel Moreto (UPC and BSC)
When: Monday, July 7th at 11:00 am.
Where: Onsite at Galicia Supercomputing Centre, CESGA // Online https://call.lifesizecloud.com/226802
Abstract:
Since 2004, the Barcelona Supercomputing Center is leading the European efforts to develop High Performance Computing (HPC) designs based on domestic technology. In the context of the Mont-Blanc European projects (2011-2021) and in close collaboration with Arm and Atos, BSC deployed the first HPC cluster based on Arm technology. More recently, BSC led the design, verification and fabrication of RISC-V-based vector accelerators in the context of the European Processor Initiative (EPI) and RISC-V general purpose processors in the context of the DRAC project. Since March 2025, BSC is leading the Digital Autonomy with RISC-V in Europe (DARE) project that will develop prototype HPC and AI systems based on EU-designed and developed industry-standard chiplets. In this talk, we will provide an overview of the main achievements in these projects, focusing on the efforts to accelerate HPC workloads with RISC-V official and custom ISA extensions. Finally, we will present current challenges to achieve European technological independence based on the RISC-V open instruction set architecture.
Bio: Miquel Moreto is an Associate Professor (with tenure) at the Computer Architecture Departament (DAC) at the Universitat Politecnica de Catalunya (UPC), where he teaches Computer Architecture. Since 2025, he is the Director of the High Performance Computer Architecture research area at the Barcelona Supercomputing Center (BSC), coordinating 10 research groups and over 150 researchers in computer architecture. He received the BSc, MSc, and PhD from the UPC. His PhD thesis advisors were Mateo Valero and Francisco J. Cazorla. During his PhD, he interned at IBM T. J. Watson Research Center for 4 months, and visited the Universities of Edinburgh and Cantabria for 3 months. After finishing the PhD, he spent 15 months at the International Computer Science Institute (ICSI), affiliated with UC Berkeley, as a Fulbright Postdoctoral Research Fellowship Holder during 2011 and 2012. In 2013, he returned to Barcelona to work on the RoMoL and Mont-Blanc projects. In 2017, he spent 2 months at Arm Research (Cambridge, UK) as a Visiting Professor. In 2018, he continued his career as a Ramón y Cajal fellow at UPC, leading the Lagarto initiative that developed the first open source processor in Spain based on the RISC-V ISA. Finally, he became Associate Professor at UPC in 2023.